T-flip flop using D-flip flop using Verilog Code
T-flip flop using D-flip flop:
Here, we have to implement T flipflop using D flipflop. We know that T flipflop produces the output as the toggle of input, and D flipflop produces the same output as input. So we have to use not gate here in order to get the waveform of T flipflop. We had made a D flipflop and instantiate here so that we can take output of D to make T-flip flop. Input t, clock and reset are taken and output is taken as q. Wire d is taken, it takes the value as the output of not gate and act as input to D flipflop. Hence, T-flip flop is implemented.
Verilog Code for T-flip flop using D-flip flop:
module TFF1(q,t_clk,rst);
output q ;
input t_clk,rst;
wire d;
DFF dff0(q,d,t_clk,rst); //module instantiation of d flipflop.
not n1(d,q);
endmodule
module DFF(q,d,d_clk,rst);
output q ;
input d_clk,rst,d;
always@(posedge d_clk)
begin
if(rst)
q<=1,b0;
else
q<=d;
end
endmodule
0 Comments